This proposal is in the Project Proposal Phase (as defined in the Eclipse Development Process) and is written to declare its intent and scope. We solicit additional participation and input from the community. Please login and add your feedback in the comments section.
Project
Parent Project
Working Group
Proposal State
Created
Background
We are refactoring the OpenHW CORE-V Cores project into separate, more focused, projects. This new project will provide the home for work on the CVA6 core
Scope
OpenHW CVA6 is a highly configurable, 6-stage RISC-V core for both application and embedded applications. Application class configurations are capable of booting Linux.
Description
Industrial and academic projects requiring access to either 32- or 64-bit, embedded or application class cores. The CVA6 can be synthesized for both FPGA and ASIC targets.
Initial Contribution
All project content exists already as part of the OpenHW CORE-V Cores project.
The listed GitHub projects should be removed from the OpenHW CORE-V Cores project when this project is created.
Source Repository Type
- Log in to post comments
Proposal approve
Submitted by Cesar Fuguet on Tue, 09/23/2025 - 04:10
This looks good to me.
Regarding the HPDcache, even if it is not dedicated to the CVA6 (it is used by other RISC-V cores like the ones developed by BSC), it is for the moment the only OpenHW core using it.
Thank you to all implicated people in this proposal.