Eclipse Aidge is CEA LIST's CAD framework for designing and simulating Deep Neural Network (DNN), and building full DNN-based applications on embedded platforms. Eclipse Aidge is developed along with industrial and academic partners and is open source.
Eclipse Aidge provides a platform for fast and accurate Deep Neural Network (DNN) simulation and full and automated DNN-based applications building.
In-scope :
- Database handling
- Data pre-processing
- Deep network building
- Deep network training
- Deep network optimisation (quantization during training)
- Performances evaluation
- Deep network preparation for hardware export
- Hardware exports
The Eclipse N2D2 platform is a comprehensive solution for fast and accurate Deep Neural Network (DNN) simulation and full and automated DNN-based applications building. The platform integrates database construction, data pre-processing, network building, benchmarking and hardware export to various targets. It is particularly useful for DNN design and exploration, allowing simple and fast prototyping of DNN with different topologies. It is possible to define and learn multiple network topology variations and compare the performances (in terms of recognition rate and computationnal cost) automatically. Export hardware targets include CPU, DSP and GPU with OpenMP, OpenCL, Cuda, cuDNN and TensorRT programming models as well as custom hardware IP code generation with High-Level Synthesis for FPGA and dedicated configurable DNN accelerator IP.
The Eclipse Aidge platform is a comprehensive solution for fast and accurate Deep Neural Network (DNN) simulation and full and automated DNN-based applications building. The platform integrates database construction, data pre-processing, network building, benchmarking and hardware export to various targets. It is particularly useful for DNN design and exploration, allowing simple and fast prototyping of DNN with different topologies. It is possible to define and learn multiple network topology variations and compare the performances (in terms of recognition rate and computationnal cost) automatically. Export hardware targets include CPU, DSP and GPU with OpenMP, OpenCL, Cuda, cuDNN and TensorRT programming models as well as custom hardware IP code generation with High-Level Synthesis for FPGA and dedicated configurable DNN accelerator IP.
The N2D2 trademark belongs to CEA. No problem foreseen to pass it on to the Eclipse Foundation. Current codebase is licensed under Cecile but we are willing to re-license it under the EPL v2 license. We own the complete codebase and are able to re-license it.
The final project's name might change before the project creation.
The Eclipse fundation brings strong garantees regarding the impatiality, governance, IP and perennity of the project that are extremely important for our partners and for the community in general.
The project aims to develop a platform focused on the problems of embedded AI, giving pride of place to national and European component suppliers and interoperability with other existing platforms on the market. This is a positioning that is still relatively unclaimed or not claimed by existing platforms, which are still tailored for the cloud and on which the project's actors have strong expertise, solid technological building blocks and an advance on the state of the art. Thus, the first innovation of the project is to address within a single platform the entire chain of design and deployment of AI for embedded systems. Beyond the integrated aspect, it is planned to develop a set of high value-added functionalities that go beyond the state of the art, to generate innovative and low-cost applications:
- Robust optimization of deep neural network graphs, combining quantization, parsimony and robustness from model learning;
- High-level hardware design and benchmarking, facilitating hardware target selection and development of embedded systems;
- Embedded trust, including the integration of business knowledge and formal constraints in embedded models, taking into account the specificity of sensors and physical processes;
- Learning algorithms for adapting models to embedded systems and their evolution with little data and/or few labels;
In addition, there is extensive interoperability with major market standards and platforms, allowing the platform to be used with existing developments, which is essential for the adoption and sustainability of the platform.
At the end of the chain, for the deployment of models, the platform will allow the automatic generation of codes that can be executed on various hardware targets without software dependency on the platform. This allows a controlled integration in the design and deployment process of innovative products. Users will be able to quickly benchmark hardware targets and be able to choose the target, even heterogeneous ones, that offers the best performance according to their own criteria (application performance, speed of execution, energy consumption, etc.).
We propose an annual cycle of major releases:
September 2023 : 1st release of the [open source] platform
- Progress and positioning report vs state of the art;
- Documentation, tutorials and examples of implemented functions;
- Functional roadmap of the next release.
September 202X: N+1th major release of the platform. [open source]
See https://github.com/CEA-LIST/N2D2
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